Inspired by this Game of Life question.
Wireworld simulates "electrons" flowing through "wires", simple arrangements of which produce typical logic gate behavior.
I challenge you to build a digital clock in the Wireworld cellular automaton. Your clock must count upwards from 00:00 to 23:59 in the usual fashion, or to 11:59 with an AM/PM indicator, then reset.
Your entry should be visibly divided into two parts. Part A should contain all of the non-display logic, all of the parts involved in incrementing and looping the digits. Part B will be the display and the logic that drives it. The only connection between these two parts should be 16 wires representing the four digits of the time in BCD (with one optional wire for the AM/PM indicator, and one optional wire for a signal clock line if your signals aren't continuous). (EDIT: always-zero wires can be omitted)
The timing of the clock behavior should be consistent. The simulation should take the same number of ticks for each of the 1440 transitions between states. Any electrons on the 16 wires should emitted from part A at the same time and start their trip in parallel.
This is a code-golf competition. Your score is the area of the axis aligned bounding box surrounding part A.
By analogy, if this were a textual language, your score would be the size of the clock-management function producing four 4-bit outputs, which contains a loop and the logic for 4 counters, not the function that decodes and prints that output.
Your part B can be as large or small as you'd like. It is only required so that the output of your submission can be seen by someone running it, since there is no easy way to simply "debug" outputs from a wireworld circuit. There are multiple BCD->7segment circuits available online. Feel free to use whichever one you'd like, or make your own if you need a clocked signal line, and display your AM/PM indicator at some scale similar to the digits.
EDIT: Part B is now optional. If you just have the BCD outputs from your part A, feel free to submit that. It will be more tedious to confirm the clock works, but I can read a row of bits just fine in a paused simulation.