In this question, a mapping is defined between EBCDIC and a superset of ISO-8859-1.
Your task is to build a network of two-input NAND gates that will take eight inputs
A1, A2, A4, ..., A128 representing an EBCDIC character and return eight outputs
B1, B2, B4, ..., B128 that represent the corresponding "ISO-8859-1" character according to that mapping.
To simplify things, you may use AND, OR, NOT, and XOR gates in your diagram, with the following corresponding scores:
Each of these scores corresponds to the number of NAND gates that it takes to construct the corresponding gate.
The logic circuit that uses the fewest NAND gates to correctly implement all the above requirements wins.