A 2-way universal logic processor (2ULP) is a network of logic gates that takes two input wires A
and B
, as well as four other inputs L_
, L_a
, L_b
, and L_ab
, and produces a single output L(a, b)
using the four L
inputs as a truth table function:
- The 2ULP returns
L_
ifA
andB
are both0
. - It returns
L_a
ifA = 1
andB = 0
. - It returns
L_b
ifA = 0
andB = 1
. - It returns
L_ab
ifA
andB
are both1
.
For example, given the inputs L_ = 0
, L_a = 1
, L_b = 1
, and L_ab = 0
, then the output L(a, b)
will be equal to A xor B
.
Your task is to build a 2ULP using only NAND gates, using as few NAND gates as possible. To simplify things, you may use AND, OR, NOT, and XOR gates in your diagram, with the following corresponding scores:
NOT: 1
AND: 2
OR: 3
XOR: 4
Each of these scores corresponds to the number of NAND gates that it takes to construct the corresponding gate.
The logic circuit that uses the fewest NAND gates to produce a correct construction wins.