Simulate an edge-triggered D Flip-Flop.
What is D Flip-Flop?
A D flip-flop is an electronic digital device that outputs an inputted data (abbr. D) with synchronization to a clock (abbr. CLK). Usually CLK is a uniform pulse, but in this challenge, CLK may be not uniform.
A bitstring with length \$n\$ will be given as CLK and another bitstring with length \$n-1\$ will be given as D. A bit represents the state of an input during a unit time (tick). CLK leads D by half a tick.
The output (abbr. Q) is a bitstring with same length and starting timepoint as D. If CLK doesn't start with
01, the starting bit of Q is implementation-defined. Q is updated upon a rising moment of CLK to the bit of D at the time. On the other times, Q retains its state.
The red line indicates a rising moment of CLK.
- Example 1:
- Example 2:
- If CLK isn't a tick longer than D, the entire challenge falls into don't care situation.
- Though defined as bitstrings, the actual elements of CLK, D, and Q doesn't matter. In this case, if a string is not binary (that is, contains a third character), the entire challenge falls into don't care situation.